The invention relates to a circuit arrangement for controlling an inductive load.
A specific field of application of the invention is the control of an inductive load in the form of an electromagnetic driver device for a brake valve of an anti-locking brake system (ABS). The disclosed embodiments of the invention are concerned specifically with the closed-loop control of an inductive load with the aid of a PWM adjusting or control signal, i.e., a control signal in the form of a pulse train with variable pulse duty factor or duty cycle (DC=ratio of pulse duration to pulse interval). The PWM control signal (PWM=Pulse Width Modulation) opens and blocks an electronic current switching element provided in the circuit of the inductive load.
The inductive load to be controlled, which is located in a first circuit branch, usually has a second circuit branch connected in parallel thereto which contains a flyback diode. The electronic current switching element is provided in a third circuit branch in series connection xe2x80x9cupstreamxe2x80x9d or xe2x80x9cdownstreamxe2x80x9d of the first and second terminals of the first and second circuit branches. When the electronic current switching element opens and closes in alternating manner, current is flowing through the inductive load when the current switching element is opened, whereas with closed current switching element there is a reverse current flow through the flyback diode due to the energy stored in the inductive load.
If it is desired to control, for example, a fluid pressure by means of the inductive load (for example an electromagnet), this is effected by controlling the current flow through the inductive load. To this end, the current flow through the inductive load is measured in order to obtain an actual current signal, and this actual current signal is compared to a target or desired current signal corresponding to the current desired in order to provide a PWM control signal for controlling the current switching element on the basis of the comparison result.
The determination of the current flow through the inductive load usually takes place with the aid of a measuring resistor connected directly in series with the inductive load or arranged in series with the electronic current switching element. The measuring resistor delivers a measurement voltage. This measurement voltage is compared to a reference voltage corresponding to the desired current signal. The reference voltage is delivered by a reference resistor connected in series with a variable current source. By means of the variable current source, it is possible to provide the desired current signal at the reference resistor, with the reference voltage then corresponding to the desired current intensity through the inductive load.
Circuit arrangements of the type concerned here are usually in the form of integrated circuits. The inductive load to be controlled is connected to a battery voltage terminal and an output voltage terminal. Apart from the inductive load to be controlled proper, all or almost all circuit elements are provided within the integrated circuit.
In such a circuit arrangement, there arises considerable power dissipation, depending on the duty cycle (DC) of the PWM control signal. In case of high duty cycle and correspondingly strong current flow, there is high power dissipation created, which needs to be dissipated with the aid of a correspondingly large chip area. As is known, the power dissipation is proportional to the resistance and moreover proportional to the square of the current. However, current control is indispensable due to the high temperature dependency of the ohmic resistance component of the inductive load. This holds for most, if not all, applications of the type concerned here.
The dependency of the power dissipation in the measuring resistor on the duty cycle of the PWM setting signal corresponds to a monotonously increasing curve. Usable in practical application is the range between 10% and 90%. In order to obtain relatively high accuracy in particular in the lower measuring range, it is necessary to use a high resistance value for the measuring resistor. The measurement accuracy in the lower range is of particular significance in most applications. With an about linear increase of the power dissipation as a function of the duty cycle, however, the measurement accuracy is relatively low in the lower measuring range, whereas considerable power dissipation arises in the upper measuring range.
The disclosed embodiments of the present invention make available a circuit arrangement for controlling an inductive load, which, with a preset value of the measuring resistor, has lower power dissipation in the measuring resistor in comparison with that of the prior art, and which, with preset power dissipation, can make do with comparatively little chip area. With preset maximum power dissipation, an increase in the value of the measurement resistor is possible in order to thus obtain higher measurement accuracy in the lower measuring range.
To this end, the embodiments of the invention provide a circuit arrangement for controlling an inductive load, including:
a) a first circuit branch located between a first terminal and a second terminal and including the inductive load to be controlled;
b) a second circuit branch located between the first terminal and the second terminal and including a flyback diode;
c) a third circuit branch located between the first and second circuit branches on the one hand and a third terminal on the other hand and including an electronic current switching element having a control terminal to which a PWM control signal is supplied;
d) a current sensor for sensing a current dependent on the current flowing through the inductive load, and for generating an actual current signal; and
e) a closed-loop control circuit receiving as first input signal the actual current signal and as second input signal a desired current signal in order to form thereof the PWM control signal;
f) the current sensor being arranged in the second circuit branch.
The current sensor preferably is an ohmic measuring resistor connected in series with the flyback diode in the second circuit branch. The desired current signal preferably is formed in a fourth circuit branch connected to the second circuit branch and containing a reference resistor and in particular a variable current source. The current determined by the current source generates at the reference resistor a reference voltage representing the desired current signal. This desired current signal is compared to the actual current signal in the form of the measurement voltage created at the measuring resistor, in order to obtain a deviation signal that in a preferred embodiment of the invention is created as a sign signal. This sign signal then is processed further in order to obtain the PWM control signal.
With an ohmic measuring resistor, the measurement voltage changes proportionally with the current intensity. The measurement results obtained are relatively exact.
In one specific embodiment of the invention, the current sensor is constituted by a component having non-linear characteristics, for example diode. In accordance with the diode characteristics, the reference element in the fourth circuit branch then is an element having characteristics corresponding to the current sensor, and thus in particular a reference diode in the instant case. The measuring diode and the reference diode are provided with substantially identical characteristics. Due to the fact that identical characteristics are not easy to obtain, this embodiment is suitable in particular for such applications in which a relatively high tolerance is permissible. As a measuring diode, the flyback diode proper can be employed as well.
Before describing specific embodiments of the invention, the differences between the invention on the one hand and the prior art on the other hand are to be elucidated, by way of FIGS. 5, 6 and 8, on the basis of the significance of the measure to arrange the current sensor in the second circuit branch, i.e., in the parallel branch of the inductive load to be controlled.
According to FIG. 5, a first circuit branch 4 is located between a first terminal 1 coupled with battery voltage VBat and a second terminal 2 having a voltage Vout applied thereto, said circuit branch 4 having an inductive load to be controlled, which in the instant case consists of an inductance 6 having an ohmic resistance component 7 associated therewith.
Connected to second terminal 2 is a third circuit branch 5. Third circuit branch 5 contains an electronic switching element 11, which in the instant case is in the form of a MOSFET, for example. The source-drain path is either conducting or blocking the current flow through third circuit branch 5, depending on a PWM control signal PWM (Gate) that is supplied to a control terminal 12 of current switching element 11. In the opened, i.e., activated state of current switching element 11, a closing resistor Ron is active in series within third circuit branch 5. Voltage Vout at second terminal 2 changes suddenly in accordance with the PWM signal. When current switching element 11 is opened, Vout corresponds approximately to the voltage at third terminal GND. When current switching element 11 is blocked, voltage Vout at terminal 2 is higher than battery voltage VBat, as will still be elucidated in more detail hereinbelow.
FIG. 6, in the uppermost line, shows the PWM control signal PWM (Gate). Shown in broken lines at the bottom of FIG. 5 is a measuring resistor RM1 which is disposed between current switching element 11 and third terminal GND, as known from the prior art. The second line in FIG. 6 shows the path of measurement voltage VRM1, at measuring resistance RM1 as a function of the PWM signal. If the PWM signal is of high level (e.g., 5V), electronic current switch 11 is conducting, and voltage VRM1 arises at measuring resistor RM1 due to the current flow. The power then is IL2*RM1. As averaged over the period duration, the power is dependent on the duty cycle (DC).
FIG. 5 shows an alternative to the arrangement of the measuring resistor. Between second terminal 2 and resistor 7, there is disposed a measuring resistor RM2 shown in a broken-line box to point out thatxe2x80x94just as with the measuring resistor RM1xe2x80x94it is not really contained in the circuit but just constitutes a possibility corresponding to the prior art. In measuring resistor RM2, there is a current flowing when current switch 11 is opened and there is a current flowing when current switch 11 is closed. The latter reverse current when current switch 11 is blocked flows from inductance 6 through resistor 7 and measuring resistor RM1 to a second circuit branch 3 connected in parallel to first circuit branch 4. Second circuit branch 3 contains a flyback diode 8. The current flow through measuring resistor RM2 results in a voltage VRM2 shown in the third line of FIG. 6. The corresponding power is IL2*RM2.
Measuring resistor RM3, bearing reference numeral 9 in second switching branch 3, corresponds to the present invention. A measurement voltage VRM3 arises at measuring resistor RM3 when current switching element 11 is blocked, as is gatherable from a comparison of the first and last lines in FIG. 6. The power dissipation in measuring resistor RM3 is IL2*RM3.
In the following, the power dissipation in the measuring resistor RM3 arranged according to the invention, on the one hand, and in the two alternative measuring resistors RM2 and RM3 according to the prior art, on the other hand, shall be examined in more detail.
The maximum power dissipation in measuring resistor RM1 is
PMAX=IL2*RM1*DCxe2x80x83xe2x80x83(1)
The maximum power dissipation in second measuring resistor RM2 is
PMAX=IL2*RM2xe2x80x83xe2x80x83(2)
The power dissipation in measuring resistor RM3 arranged according to the invention is
PRM3=I2*RM3(1xe2x88x92DC)xe2x80x83xe2x80x83(3)
The current IL fluctuating near the desired value in accordance with the control operation is as follows in the first and second circuit branches 4 and 3, respectively:                               I          L                =                                            V              Bat                                                      R                L                            +                              R                ON                                              *          D          ⁢                      xe2x80x83                    ⁢          C                                    (        4        )            
By inserting equation (4) into equation (3), one obtains                               P          RM3                =                  xe2x80x83                ⁢                                            (                                                V                  Bat                                                                      R                    L                                    +                                      R                    ON                                                              )                        2                    *          D          ⁢                      xe2x80x83                    ⁢                      C            2                    *          RM3          ⁢                      xe2x80x83                    ⁢                      (                          1              -                              D                ⁢                                  xe2x80x83                                ⁢                C                                      )                                              (5a)                                          xe2x80x83                ⁢                  =                      xe2x80x83                    ⁢                                                    V                Bat                                  *                  RM3                                                                              (                                                            R                      L                                        +                                          R                      ON                                                        )                                2                                      ⁢                          xe2x80x83                        ⁢                          (                                                D                  ⁢                                      xe2x80x83                                    ⁢                                      C                    2                                                  -                                  D                  ⁢                                      xe2x80x83                                    ⁢                                      C                    3                                                              )                                                          (5b)            
The curve of power PRM3 as a function of the duty cycle DC is shown in FIG. 8. When the above equation (5b) is differentiated on the basis of DC, the result is                                           ⅆ                          P              RM3                                            ⅆ                          D              ⁢                              xe2x80x83                            ⁢              C                                      =                                                            V                Bat                2                            +                              RM                                                      xe2x80x83                                    ⁢                  3                                                                                    (                                                      R                    L                                    +                                      R                    ON                                                  )                            2                                ⁢                      xe2x80x83                    ⁢                      (                                          2                ⁢                D                ⁢                                  xe2x80x83                                ⁢                C                            -                              3                ⁢                D                ⁢                                  xe2x80x83                                ⁢                                  C                  2                                                      )                                              (        6        )            
Obtained from
2DCxe2x88x923DC2=0xe2x80x83xe2x80x83(7)
is, in addition to the trivial solution
DC1=0xe2x80x83xe2x80x83(8)
the value
DC2=⅔=66%xe2x80x83xe2x80x83(9)
In addition to the curve pattern for PRM3 as a function of DC, FIG. 8 shows in addition the approximately linear path of PRM1 and PRM2. It can be seen that the maximum power dissipation for measuring resistors RM1 and RM2 is obtained only with the maximum duty cycle DC, whereas with the aid of the measuring resistor RM3 arranged according to the invention it is already obtained at a DC value of 0.66 or 66%.
From FIG. 8 and the statements made hereinbefore, the following can be derived: when considering the lower measuring range, in the instant case below DC values of approx. 0.6, a considerably steeper increase of the curve for PRM3 results there as compared to the linear path for PRM1 or PRM2. With a preset maximum power dissipation (for example 1 W), one thus obtains by the measure according to the embodiments of the invention a considerably higher measuring accuracy in the lower, important measuring range.
With a preset resistance value for the measuring resistor, it would be possible to employ a lower resistance value, achieving comparable sensitivity. The parabola-like curve for PRM3, in the lower range of the DC values, would extend approximately parallel to the straight line for RM1 and RM2, but would already reach its maximum value below the maximum value shown in FIG. 8.
A lower value for the resistance of RM3 thus means less power dissipation and correspondingly less chip area.
The invention can be implemented in a series of different embodiments, with these embodiments in part also containing new elements, independently of the measure of arranging the measuring resistor in the parallel circuit of the inductive load, as explained in detail hereinbefore. An essential component of the circuit arrangement for controlling an inductive load is the formation of the deviation signal from the actual current signal and the desired current signal in conjunction with the generation of the PWM control signal. In one embodiment, the invention provides for an RS flipflop having the sign signal supplied to the setting input thereof and a clock signal supplied to the resetting input thereof and having its output connected to the control terminal of the current switching element. The sign signal is formed by comparison of the reference voltage formed by the current source signal at the reference resistor with the measuring voltage arising at the measuring resistor. In the embodiment according to the invention, the RS flipflop is fed on the one hand with the sign signal for setting the flipflop and on the other hand with the clock signal for resetting the flipflop. The clock signal has a certain frequency which predetermines the switching frequency for the current switching element. The on-period of the current switching element, i.e., the duty cycle, is dependent on the sign signal, i.e., on the ratio of the actual current signal to the desired current signal. If the actual current is too weak, the current switching element has to be opened longer for increasing the current. Too little current leads to a correspondingly low measuring voltage at the comparator, so that the sign signal at the setting input of the RS flipflop appears at a relatively early time and thus increases the duty cycle. The effect achieved by way of such a circuit is that the current flowing through the inductive load is controlled to a minimum value. Upon reaching of the minimum value in accordance with the current delivered from the current source, switching over of the PWM control signal takes place to open the current switching element.
Considerably faster and exacter control can be achieved by another embodiment of the invention. This other embodiment of the invention provides:
a) an up/down counter having an up/down control input to which the sign signal is supplied, and a clock input to which a clock signal of a first frequency is supplied, as well as a count output;
b) a ramp counter having a clock input to which a clock signal of a second frequency is supplied, and a count output; and
c) a digital comparator having a first input connected to the count output of the up/down counter, a second input connected to the count output of the ramp counter, and an output connected to the control terminal of the current switching element.
Up/down counter counts on the basis of the clock frequencies, with the contents thereof changing in upward and downward directions in accordance with the sign signal supplied thereto. Ramp counter counts relatively fast from a minimum value (for example 0) to a maximum value, with the count thereof corresponding to a ramp signal, in order to be reset again to the minimum value after reaching the maximum value and to start the counting operation anew. In connection with the comparator, the result obtained is similar to that obtained by a comparison of a slowly changing voltage or a direct current voltage with a sawtooth signal: at the output of the comparator, either a signal of high level or a signal of low level is created, depending on the sign situation. This signal is the PWM control signal supplied to the control terminal of the current switching element.
The clock signal for the ramp counter, i.e., the clock signal with the second frequency, may be a rigid system clock.
A preferred embodiment of the invention does not employ a clock signal of constant, first frequency for controlling the up/down counter, but a clock signal of variable frequency. This variable first frequency for the up/down counter becomes higher as the deviation between desired current signal and actual current signal increases. With strong control deviation, a specific embodiment of the invention makes use of a voltage-controlled oscillator which delivers a frequency-variable signal, with the voltage-controlled oscillator to this end receiving at the two input terminals thereof the actual current signal and the desired current signal, respectively, and having its output connected to the clock input of the up/down counter. In the case of strong control deviation, the voltage-controlled oscillator (VCO) delivers a clock signal of relatively high frequency, so that the up/down counter counts relatively fast in order to then count with a relatively low-frequency clock signal when desired current signal and actual current signal approach each other. By way of this measure, particularly rapid and nevertheless exact control of the current intensity in the inductive load is achieved without strong overshooting being caused.
For synchronizing the counting operation in the up/down counter with opening and closing of the current switching element, a preferred embodiment of the invention has a gate connected upstream of the clock input of up/down counter, with said gate being opened by the negated PWM control signal.
The above-described embodiment of the circuit arrangement according to the invention, comprising an up/down counter in conjunction with a ramp counter, can be refined still further for improving the control behavior, by:
a) a first up/down counter part referred to as I or integral counter;
b) a second up/down counter part referred to as P or proportional counter;
c) a PWM register having an input and an output; and
d) an adder having two inputs connected to the output of the I counter part and to the output of the P counter part, respectively, and an output connected to the input of the PWM register,
e) the output of the PWM register being connected to the input of the digital comparator, the clock input of the P counter part being fed with the clock signal of the first frequency, the clock input of the I counter part being fed with a clock signal of a third frequency that is preferably lower than the first frequency, and the P counter part having a resetting input connected to the ramp counter and receiving from the same a resetting signal in each ramp period.
Preferably, the clock signal of the I counter part is formed from the clock signal of the P counter part by frequency division. By splitting the up/down counter into an I counter part, clocked relatively slowly, and a P counter part, clocked relatively rapidly, a PI control behavior is obtained. The P portion provides for rapid approximation of the actual current to the desired current, while the I counter part provides for smoothing of the control behavior.
Depending on processing of the deviation signal obtained by comparison of the desired current signal and actual current signal, there is on the one hand the possibility of providing only one constant measuring time within each period duration of the PWM control signal. On the other hand, the measuring time can cover the entire time duration within which current flows through the measuring resistor. Such a measuring time then corresponds in essence to the pulse interval of the PWM control signal. However, the measuring time thus is dependent on the particular duty cycle DC of the PWM control signal. If the measuring time is short, only relatively few pulses are counted within such a short measuring time when a clocked counter is employed, whereas correspondingly more pulses will be counted with a longer measuring time. For avoiding measuring errors in this respect, a specific further development of the invention provides for measuring time compensation. The measuring time compensation is made using a measuring time compensation circuit which scales down the clock signal of the first frequency, that is supplied to the clock input of the up/down counter, as a function of the duty cycle of the PWM control signal in such a manner that, with high duty cycle and thus long measuring time, relatively strong scaling down takes place, whereas with low duty cycle only relatively weak scaling down takes place. Accordingly, counting with a relatively slow clock takes place with a long measuring time, while counting with a correspondingly faster clock takes place in the case of a relatively short measuring time. The effect achievable by corresponding selection of the scaling down ratio for longer measuring times is that counting operations independent of the measuring time take place. In a preferred embodiment of the invention, the measuring time compensation circuit comprises:
a) a resettable counter having an input receiving an input clock signal with an input frequency, and having a counter output and a resetting input;
b) a divisor register having an output and a setting input via which a digital value in the divisor register is adjustable that is in inverse ratio to the duty cycle of the PWM control signal, and
c) a divider circuit having a dividend input connected to the output of the counter, a divisor input connected to the output of the divisor register, and an output passing the clock signal of the first frequency to the clock input of the up/down counter.
This structure of the measuring time compensation circuit is comparatively simple and delivers the correct amounts of counting pulses to the up/down counter, irrespective of the measuring time and the duty cycle of the PWM control signal, respectively.